Agilent/Keysight E1403B
Agilent / Keysight VXI Modules. Model: E1403B.
- Model
- Agilent / Keysight E1403B
- Calibration
- Available on request
- Price
- $1,500
- Status
- In stock
- RFQ ref
- E1403B
This unit
The Agilent/Keysight E1403B is a VXI carrier module that enables integration of A- or B-size VXI or VME modules into C-size VXI mainframes. Operating as a slave-only device, It has a fully buffered P1 connector extension and cannot function in Slot 0 or with bus masters. Available in 1-slot (standard) or 2-slot wide (Option 002) configurations, the E1403B accommodates any number of adapters within a C-size mainframe, making it ideal for system expansion and legacy VXI platform integration.
Technical Specifications
- Module Type: VXI Carrier Module
- Module Width: 1-slot (standard) or 2-slot (Option 002)
- Functionality: Slave-only operation
- Connector: Single P1 with full buffering and extension capability
- VXI Size Compatibility: Accepts A- or B-size VXI or VME modules
- Mainframe Compatibility: C-size VXI mainframes
Key Features
- Fully buffered P1 connector extension ensures signal integrity across module boundaries
- Flexible width options support diverse system layouts and space constraints
- Slave-only architecture simplifies integration without bus mastering requirements
- Supports scalable configurations with multiple adapters in a single mainframe
Typical Applications The E1403B addresses system integration challenges in VXI test platforms requiring form-factor adaptation. Engineers deploying legacy A- or B-size modules in newer C-size mainframe environments benefit from its buffered extension capability. Multi-adapter configurations enable modular test system expansion while preserving existing module investments.
Compatibility & Integration Designed exclusively for C-size VXI mainframes, the E1403B accepts any A- or B-size VXI or VME module. Slot placement restrictions - prohibition of Slot 0 and bus master operation - ensure proper VXI bus protocol compliance. Slave-only operation streamlines system design and eliminates bus arbitration complexity in mixed-size module configurations.