Astronics / C&H Technologies VX491C Counter/Clock VXI Module

The Astronics / C&H Technologies VX491C is a single-slot C-size VXI counter/clock module engineered for precise timing, pulse generation, and event measurement in data acquisition and test systems. It delivers a stable 10 MHz master clock source with multiple derived outputs, six 32-bit counters, and integrated time-of-day clock functionality. The module operates within VXIbus-compliant mainframes and supports flexible triggering, programmable interrupts, and SCPI-compatible control.

Technical Specifications

Module Type: Counter/Clock VXI Module, C-size, single-slot

VXIbus Compliance: ANSI/IEEE Std. 1014-1987, IEC 821, IEC 822, VXIbus Rev 1.4

Master Clock: On-board oven-controlled 10 MHz oscillator

Clock Outputs: Four derived outputs from 10 MHz master clock

Counters: Six 32-bit counters

Time-of-Day Clock: Included

Connectors: Standard VXIbus backplane (P1 and P2)

Form Factor: 23.3 × 34 cm (C-size)

Key Features

Oven-controlled 10 MHz master oscillator ensures timing stability

Multiple clock outputs derived from master reference frequency

Programmable interrupts on master clock drop-out, counter roll-over, match conditions, periodic intervals, and set time-of-day events

Flexible trigger sourcing from front panel or VXI Bus

32-bit counter resolution enables high-resolution event and interval measurement

Integrated time-of-day tracking for absolute time reference

Typical Applications

Precise timing and clock generation for data acquisition systems

Pulse stimulus generation with programmable characteristics

Pulse counting and time period measurement

Trigger signal generation for synchronized test equipment

Event timing in automated test environments

Compatibility & Integration Designed for integration into VXIbus-compliant mainframes and systems. The module operates with VXIplug&play and SCPI standard control protocols, enabling seamless integration into modular instrumentation architectures. Power is supplied by the VXIbus mainframe via P1 and P2 connectors; cooling is provided by mainframe airflow management.