Interface Technology SR5020 TTL I/O Module

Interface Technology VXI Modules. Resolution: 100 ps.

Model
Interface Technology SR5020
Calibration
Available on request
Price
$850
Status
In stock
RFQ ref
SR5020
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This unit

The Interface Technology SR5020 TTL I/O Module is a high-density digital I/O interface for the SR5000 Digital Test Subsystem, delivering 32 stimulus and 32 response channels per module with 100 ps edge placement resolution. It integrates dual processors - a 68030 System Processor for VXI Bus communication and a Control Processor for real-time digital test functions including conditional branching, looping, and logic analysis triggering. The module scales to 640 total I/O pins when up to 20 SR5020 units are controlled by a single SR5010 Timing/Control Module. ## Technical Specifications I/O Architecture • 32 stimulus pins and 32 response pins per module • 7 memory banks, each 64K vectors deep • All memory banks operate at up to 50 MHz data rates • Up to 20 modules supported per SR5010 controller (640 total pins) Timing and Edge Control • Edge placement resolution: 100 ps • 16 timing generators per module • 8 stimulus timing generator sets (2 pairs per 8-pin group) • 2 response timing generators per module with window compare and glitch detection Data Formats and Pattern Support • Stimulus formats: NRZ, RZ, R1, RC, RI • RAM-backed and algorithmic pattern generation • 16-bit CCITT CRC signature analysis on input channels • Mask memory for selective pattern comparison Power Consumption • +5.0 V: 10.0 A (50 W at 50 MHz; 7.5 A / 37.5 W at 40 MHz) • −5.2 V: 4.0 A (20.8 W) ## Key Features • Dual-processor architecture separates VXI bus communication from real-time test execution • Conditional test logic enables dynamic test sequences without host intervention • Seven independent memory banks support complex stimulus/response scenarios • Nanosecond-class timing resolution suits memory, bus emulation, and functional test applications ## Typical Applications Bus emulation, memory device testing, functional test of TTL-compatible circuits, digital signal stimulus and capture, and signature analysis. ## Compatibility & Integration Designed for the SR5000 Digital Test Subsystem architecture. Integrates with SR5010 Timing/Control Module for multi-module scaling and centralized test sequencing.

Specifications

ParameterValue
Frequency RangeDC to 50 MHz | Voltage / Current Range: '+5.0V @ 10.0A, −5.2V @ 4.0A