Stanford Research CG648 – ECL up to 2050MHz

The Stanford Research CG648 is a ECL clock generator producing stable signals from DC to 2.05 GHz with random jitter below 1 ps rms. Built for demanding applications in research, high-speed digital systems, and communications networks, it delivers precise frequency control with 16-digit resolution and adjustable phase positioning to ±5 ns across its full operating range. Front-panel SMA outputs provide complementary square waves in ECL, PECL, LVDS, or CMOS logic levels, while a rear-panel RJ-45 connector offers differential clock distribution via RS-485 (to 105 MHz) or LVDS (to 2.05 GHz).

The CG648 features a crystal-controlled 10 MHz timebase with 5 ppm stability, upgradable to OCXO or Rubidium references for applications demanding superior frequency accuracy. Output amplitude is adjustable from 0.2 V to 1.0 V into 50 Ω loads, with offset control from −2 V to +5 V. Rise and fall times of 80 ps minimize signal degradation in time-critical applications.

Phase resolution reaches 1 degree above 200 MHz, with edge positioning better than 14 ps at any frequency between 0.2 Hz and 2.05 GHz. An optional PRBS generator supports eye-pattern testing of high-speed data channels up to 1.55 Gb/s. Fast settling time under 30 ms ensures rapid frequency transitions.

Remote control via RS-232 and IEEE-488/GPIB enables automated test sequences and system integration.

Technical Specifications

• Frequency Range: DC to 2.05 GHz


• Output Logic Levels: ECL, PECL, LVDS, CMOS, RS-485


• Jitter: Random jitter 200 MHz); 1 nanodegree (finest)


• Edge Positioning Resolution: Better than 14 ps (0.2 Hz to 2.05 GHz)


• Time Modulation Range: ±5 ns


• Timebase Stability: 5 ppm (crystal); upgradable to OCXO or Rubidium


• Settling Time: < 30 ms


• RS-485 Rear Output: Up to 105 MHz


• LVDS Rear Output: Up to 2.05 GHz


• PRBS Generator (Optional): Up to 1.55 Gb/s

Key Features

• Complementary Q and −Q front-panel outputs on SMA connectors


• Differential clock distribution via RJ-45 on twisted pairs


• Rear-panel ±5 VDC power for optional line receivers


• Adjustable phase and edge timing for precision synchronization


• Dual timebase options for stability-critical measurements

Typical Applications

• High-speed digital system clocking and synchronization


• Data acquisition and transmission systems


• Communication network testing and development


• Eye-pattern analysis for serial data channels


• Phase-coherent measurement systems

Compatibility & Integration

• Designed to work with optional line receivers (CG640 to CG649)


• Interfaces via RS-232 and IEEE-488/GPIB for remote control


• Supports CAT-6 cable termination at 100 Ω (rear RJ-45 output)